A recursive digital filter implementation for noisy and blurred images

This paper presents the design and the implementation of an optimized Canny-Deriche edge detector, After a brief reminder of the filter’s equations, we define different techniques to speed up the sampling rate of the IIR filter. In particular, improving the throughput rate of the IIR filter, we present a look-ahead with decomposition technique. This method leads us to design a first chip, which performs at a sampling rate of over 20 MHz with a silicon area of 60 mm(2). Using a local register retiming method, we have designed a second circuit, which is able to process a pixel in 30 ns with a silicon area of 30 mm(2). These two approaches are compared. This work leads us to an ASIC which was designed in a CMOS 1 mu m technology and successfully tested.