The invention relates to a data processing processor, said processor comprising at least one processing memory (MEM) and one computation unit (CU). According to the invention, the computation unit (CU) comprises a set of configurable computation units called configurable neurones, each configurable neurone (CN) of the set of configurable neurones (SCN) comprising a module for computing combination functions (MCCF) and a module for computing activation functions (MCAF), each module for computing activation functions (AFU) comprising a register for receiving a configuration command, so that said command determines an activation function to be executed from at least two activation functions that can be executed by the module for computing activation functions (AFU).